This invention relates to a communication apparatus suitable for use in a system which digitizes audio data and/or video data using an ATM communication technology or the like, encodes the digitized data in accordance with, for example, the MPEG system, converts the encoded data into packets of a transport stream of the MPEG system and transmits the packets through a predetermined network, requiring clock synchronization with the transmission side upon decoding in reception of the data packets.
In an application which uses digital sound and/or an image, a decoder must perform decoding in synchronism with an information generation source such as, for example, output data of an encoder or stored or recorded data in encoded form. If the decoder can control the information generation source, then it is possible to adjust the rate of data to be transmitted. In this instance, the decoder should rely only upon the timing of received data to decode the data and perform display of an image or reproduction of sound.
However, where the decoder does not have a controlling function for the information generation source, for example, when data are transmitted to the decoder through a network, since the information generation source and the decoder operate with system clock signals independent of each other, coding/transmission and reception/decoding/display and so forth are performed with the system clock signals of the information generation source and the decoder, respectively. If the system clock signals do not have a common clock signal to which they can refer to each other, then the system clock signals of the information generation source and the decoder exhibit a displacement in frequency. If the two clock signals are not in synchronism with each other, the information rates of data transmitted from the information generation source and data decoded by the decoder become different from each other, and as a result, a reception buffer of the decoder overflows or underflows. Consequently, data are lost, and therefore, for example, in regard to an image, it becomes necessary to re-display a frame.
One of methods for synchronizing the system clock signal of an information generation source and the system clock signal of a decoder with each other employs information representative of a time, that is, a time stamp.
In an MPEG transport stream, a PCR (Program Clock Reference) is used as a time stamp to establish synchronism. A concept of synchronization is illustrated in FIG. 1.
A source clock of the information generation source has a counter which has a certain cycle, and a system clock signal operates the counter. The value of the counter is latched after each certain interval of time, although such interval need not be a fixed interval, and the latched value is transmitted to the decoder. This value is so-called time stamp, and the decoder uses this value to synchronize the system clock signal of its own with the system clock signal of the information generation source. Particularly, the count value held by the decoder and the received time stamp are compared with each other, and then the reception side system clock signal is controlled to increase or decrease in rate to synchronize the decoder with the information generation source based on a result of the comparison.
A construction of a phase comparison circuit provided for such synchronization on the reception side is shown in FIG. 2. Referring to FIG. 2, the phase comparison circuit is generally denoted at 20, and a time stamp received is inputted to the phase comparison circuit 20, in which it is subtracted from a value of a counter 21 by a subtractor 22 in order to compare it with the value of the counter 21. A difference obtained by the subtraction is inputted to a low-pass filter (LPF) 23, and an output of the low-pass filter 23 is converted from a digital signal into an analog signal by a digital-to-analog converter not shown and used to control a voltage controlled oscillator (VCO) 24.
An output of the VCO 24 is used as a system clock signal of the decoder, and the counter 21 is operated with the system clock signal, thereby forming a feedback loop.
Such a synchronization method as described above is employed by the MPEG-2 system layer (ISO/IEC 13818-1) and the ITU-T recommendations. In the MPEG-2, a system clock of 27 MHz is used for an encoder and a decoder. A system construction of a network which transmits data formed in accordance with the MPEG-2 is shown in FIG. 3. Referring to FIG. 3, the information generation source is a coding apparatus such as an encoder 31. However, the information generation source may alternatively be a storage apparatus which has stored encoded data in advance and can output the stored data.
Information generated by the encoder 31 is inputted to a system encoder 32. The system encoder 32 performs addition of a time stamp to the information generated by the encoder 31, conversion of the resulting information into packets and multiplexing of them to generate transport stream packets.
An MPEG-to-ATM conversion section 33 converts the transport stream into ATM cells and transmits the ATM cells to the reception side through a network 34. Upon the transmission to the reception side, the ATM cells are influenced by various delay fluctuations in the network. Production of such delay fluctuations is hereinafter described in connection with ATM cells.
A time stamp which contains such delay fluctuations is first converted into a system packet by an ATM-to-MPEG conversion section 35 and then processed by a system decoder 36 so that a system clock signal of the decoder is reproduced from the time stamp. In the case of the MPEG, a system clock signal of 27 MHz is reproduced and inputted to the decoder. The data processed by the system decoder 36 are decoded by a decoder 37.
The MPEG-2 system layer involves two streams, called as program stream and transport stream. The program stream is expected to be used in a system which is free from an error, such as a storage medium while the transport stream is expected to be used with a system which involves some error such as communication. In the program stream, a time stamp is called as an SCR (system clock reference) and is transmitted after an interval of at least 0.7 seconds or less. The SCR time stamp is included in a header of a program stream packet and is present only in packets which are used to transmit the SCR.
In a transport stream packet, a time stamp is called as a PCR (program clock reference) and is transmitted after an interval of at least 0.1 second or less. The PCR time stamp is included in a header of a transport stream packet and is present only in packets which are used to transmit the PCR.
Particularly, the PCR comprises 42 bits in total and includes two parts, of a program clock reference extension and of a program clock reference base. The former has 9 bits while the latter has 33 bits. The former counts from 0 to 299, and the latter is incremented by one with a carrier from the former. Where the system clock signal of 27 MHz in the MPEG-2 is used, a time for 24 hours can be counted in units of a 27 MHz clock by using the 42-bit counter. In other words, the PCR is considered to be a value (PCR value) of a PCR counter which is counted with a system clock signal.
As reference documents relating to the present invention, the following three documents are listed:
[1] M. Perkins and P. Skelly, xe2x80x9cA Hardware MPEG Clock Recovery Experiment in the Presence of ATM Jitterxe2x80x9d, ATM Forum contribution to the SAA sub-working group, 94-0434, May 1994;
[2] G. Franceschini, xe2x80x9cExtension of the Adaptive Clock Method to Variable Bit Rate Streamsxe2x80x9d, ATM Forum contribution to the SAA sub-working group, 94-0321, May 1994; and
[3] ISO/IEC13818-1 (MPEG-2 Systems), xe2x80x9cGENERIC CODING OF MOVING PICTURES AND ASSOCIATED AUDIOxe2x80x9d, Recommendation H.222.0, ISO/IEC JTC/SC29/WG11 NO721rev, June, 1994.
The document [1] discloses trial production of hardware for synchronization with a system clock signal of an information generation source based on data obtained by simulation of jitters generated on an ATM. The document is good to be referred to learn how synchronism is established.
The document [2] describes how to establish synchronism regarding a variable bit rate, but does not mention a delay fluctuation reduction circuit of the present invention.
The document [3] is a draft complying to international standards regarding the MPEG-2 system.
By the way, if time stamps added and transmitted by an information generation source such as an encoder side arrive at the decoder side with accurately equal intervals, then it is easy for the decoder side to establish synchronism with the system clock signal of the encoder by using the synchronization method described above. However, this method assumes at all that the delay of the transmission line is fixed. Actually, the document [3] describes that a transmission line has a fixed delay. Accordingly, if a random delay, that is, delay fluctuations, are added to a time stamp by the network and so forth, but the value of the time stamp is not changed to a suitable value taking such delay fluctuations into consideration, this gives rise to the following problems.
In particular, the value of a time stamp inputted to a PLL of the decoder side becomes a sum of a difference in clock frequency between the information generation source and the decoder and delay fluctuations. It is difficult to construct a low-pass filter of the PLL, so that it may flatten delay fluctuations because the delay fluctuations are very great. In order to reduce delay fluctuations, a considerably long time is required for the PLL to establish synchronism or the circuit is complicated in construction.
Accordingly, a countermeasure which does not employ a PLL on the decoder side to absorb delay fluctuations is required. An example of this problem is provided by a case wherein a transport stream of the MPEG-2 is used on an ATM (Asynchronous Transfer Mode) network. Due to delay fluctuations which are caused when statistical multiplexing which is a characteristic of the ATM is performed, or when a cell queues up in a buffer when transmission in a same direction from a plurality of nodes occurs on an ATM switch, an ATM cell suffers from random delay fluctuations. The ATM network performs switching based only on a header ignoring contents of a payload, so it does not rewrite a time stamp either. Accordingly, there is a problem that, even if an ATM cell is composed into an MPEG-2 system layer packet, delay fluctuations are still transmitted. In order to solve this problem, the VOD standards 1.1 of the ATM Forum recommend a method wherein a buffer is provided on the reception side so that a clock is reproduced by a PLL of a decoder while jitters are absorbed to some degree by the buffer. This method is called adaptive clock method. In a system of this type shown in FIG. 4, some amount of data is stored into a FIFO 42 on the reception side, and the output data rate from the FIFO 42 is controlled so that the data occupancy in the FIFO 42 may be fixed. The output data rate is controlled by feeding back the data occupancy in the FIFO 42 to a variation of the data occupancy through a low-pass filter 43. Jitters (hereinafter referred to as PCR jitters) generated on a PCR by the network 41 can be absorbed to some degree by the low-pass filter 43. However, although this system is simple without involving control of synchronous data and so forth, it cannot remove jitters of the network completely. If it is intended to decode an MPEG stream including PCR jitters, the response of the PLL should be retarded. However, this merely shapes jitter components in an analog fashion, and jitter components still remain as they are over a long period of time. Actually, jitters of 1 ms to 2 ms can be reduced only to approximately 3 xcexcs. Accordingly, when an MPEG stream including PCR jitters is decoded and recorded in a VTR, or an image is observed on a monitor, the system does not make a significant problem since the response of the PLL is retarded. However, if it is intended to re-distribute, in regional distribution or the like, a stream transmitted by an ATM network as it is as MPEG, then the PCR jitter value cannot satisfy the MPEG standards, and jitters on the network make a significant trouble.
In other words, the system described above cannot satisfy the quality of the studio standard level, that is, xc2x1500 ns which is a jitter value permitted to the PCR value.
Further, a related art system presumes transmission of one program. In particular, since data to be transmitted are data encoded on the same time base, only one clock is required to establish synchronism. However, for a stream of multi-programs in which data encoded with different time bases are multiplexed, a number of PLLs and clocks for synchronization equal to the number of programs are required. Thus, the related art system has a problem that the structure of the circuit is complicated.
It is thus an object of the present invention to provide a communication apparatus which allows synchronization of multimedia information in such an environment that a network generates delay fluctuations.
In order to attain the object described above, according to the present invention, on the transmission side, when an MPEG transport stream including a PCR is inputted, a difference between a count value of a network clock signal indicating a time from a preceding PCR and a PCR value in the stream counted with the network clock signal is calculated, and the count value and the resulting difference are transmitted as a PCR arrival time interval and a synchronization residual time stamp (hereinafter referred to as synchronization data), respectively. On the other hand, on the reception side, after a difference from the network clock signal is referred to based on the PCR arrival time interval and the synchronization data, calculation is performed to correct the PCR value to remove PCR jitters therefrom.
More particularly, according to an aspect of the present invention, there is provided a communication apparatus, comprising a detection for detecting a packet which includes a time stamp, a counting means for producing a clock signal synchronized with a clock signal common with that of the reception side and counting the number of clocks of the clock signal, an extraction means for extracting the count value of the counting means when a packet in which a time stamp is included arrives, a calculation means for determining an arrival interval between packets in which a time stamp is included and a synchronization residual making use of the count value extracted by the extraction means and the time stamp, and a transmission means for transmitting the packet arrival interval and the synchronization residual.
According to another aspect of the present invention, there is provided a communication apparatus, comprising a reception means for receiving a packet, a time stamp means for detecting a packet which detects, from among packets received by the reception means, those packets which include a time stamp in which information regarding a packet arrival interval and a synchronization residual is included, a detection means for detecting the packet arrival interval and the synchronization residual from the time stamp, a modification value calculation means for calculating a modification value for the time stamp from the packet arrival interval and synchronization residual and a count value obtained by counting clocks of a clock signal synchronized with a clock signal common to that of the transmission side, and a modification means for modifying the time stamp included in the received packets based on the modification value.
The above and other objects, features and advantages of the present invention will become apparent from the following description and the appended claims, taken in conjunction with the accompanying drawings in which like parts or elements denoted by like reference symbols.